1. Field
Embodiments of the present disclosure relate to a semiconductor package and a method of manufacturing the same, and more particularly, a semiconductor package capable of reducing electromagnetic interference for an individual semiconductor package and a method of manufacturing the same.
2. Description of the Related Art
In recent semiconductor devices, as the size of a chip is decreased and the number of input/output terminals is increased due to miniaturization in process technology and diversification of functions, electrode pad pitch is gradually becoming finer and the convergence of various functions is accelerated, and thus a system-level packaging technology for integrating various components into one package is emerging. In addition, a system-level packaging technology is being changed to a three-dimensional stacking technology that can maintain a short range signal in order to minimize noise between operations and improve a signal speed.
Recently, as an operation speed of electronic components has been increased and various functions have been added, the reduction of electromagnetic interference (EMI) between components has become a major issue. Previously, an EMI shielding process was applied to printed circuit boards (PCBs) and connectors, but the performance of shielding the PCBs and connectors is lower than the performance of shielding EMI in individual packages, and the size of an entire system is increased. Recently, an EMI shielding technology is being changed to be directly applied to core chips. However, in the case of a conventional wafer level package (WLP), since a process is completed at a wafer level, it is difficult to additionally perform a shielding process, and even when the shielding process is performed, manufacturing costs are increased because the shielding process is performed on individual packages.
For example, Patent Document 1 discloses a method of forming a shielding film by sputtering, which includes a mounting process of mounting a plurality of chips on a substrate and electrically connecting the substrate and the chips with bonding wires or the like, a molding process of forming a molding portion around each chip using an epoxy or the like, a first cutting process of cutting the molding portion, which surrounds each chip while leaving the substrate, using a cutter, a sputtering process of forming a shielding film formed of a conductive material on upper and side surfaces of the molding portion by sputtering, a second cutting process of cutting and dividing the substrate into individual packages, and the like. However, in the method of forming a shielding film according to Patent Document 1, since the substrate is cut after sputtering is performed thereon, a shielding film is not formed on side surfaces of the substrate, and thus an additional process of forming a shielding film on the side surfaces of the substrate has to be performed.